1. Field of Invention
The invention relates to a method for etching a feature in a silicon-containing anti-reflective coating (ARC) layer on a substrate, and more particularly to a method for etching a feature in a silicon-containing ARC layer while reducing a critical dimension (CD) or edge roughness or both.
2. Description of Related Art
Typically, during fabrication of integrated circuits (ICs), semiconductor production equipment utilize a (dry) plasma etch process to remove or etch material along fine lines or within vias or contacts patterned on a semiconductor substrate. The success of the plasma etch process requires that the etch chemistry includes chemical reactants suitable for selectively etching one material while substantially not etching another material. For example, on a semiconductor substrate, a pattern formed in a protective layer can be transferred to an underlying layer of a selected material utilizing a plasma etching process. The protective layer can comprise a radiation-sensitive layer, such as a photo-resist layer, having a pattern formed therein using a lithographic process. The protective layer can also comprise an anti-reflective coating (ARC) layer underlying the resist layer, wherein the pattern formed in the resist layer is transferred to the underlying ARC layer. In order to pattern smaller features than what is currently possible with standard lithographic techniques, it is desirable to reduce the critical dimension (CD) of the pattern during the transfer of the pattern from the resist layer to the ARC layer. Furthermore, it is desirable to correct for pattern deficiencies in the resist layer, such as edge roughness, during the transfer of the pattern from the resist layer to the ARC layer.